Harbin University of Science and Technology softwareengineering 08-7 Li Wanpeng original works ,the reprint please indicate the source of the Uboot Nandflash drive ,u-boot-2009.08 is used as MTD ( and Linux kernel memory technology device ) architecture .
Under the Uboot support for Nand is reflected in the command line to achieve the NAND flash : NAND info ,NAND ,device ,NAND read ,NAND write ,Nike Air Max Shoes,NAND erease ,NAND bad .The main data structure used are: struct nand_flash_dev ,struct nand_chip .
The former includes the main chip models ,storage capacity ,equipment ID ,Moncler UK,I / O bus width and other information ;the latter is specific to NAND flash operation to use the information .The Nandflash driver code analysis :1) lib_arm / board.
c start_armboot ( ) function to call nand_init ( ) .2) the nand_init ( ) function is defined in the drivers / MTD / NAND / Nand.c file, called the same file under the nand_init_chip ( ) function and the board_nand_select_device ( ) function ,ugg clearance uk,and accumulated Nandflash total size .
3) the nand_init_chip ( ) function to initialize the IO_ADDR_R and IO_ADDR_W ,call board_nand_init ( ) and nand_scan ( ) .( in drivers / MTD / NAND / S3c2410_nand.c ) 4) ( board_nand_init ) function in drivers / MTD / NAND / S3c2410_nand.
c, NFCONF configuration register initialization .Mainly on the struct structure of the nand_chip function pointer assignment ,they point to himself as NAND drive to prepare some of the functions ,the data structure in include / Linux / MTD / nand.
h defined .5) the nand_scan ( ) function in drivers / MTD / NAND / Nand_base.c definition file ,and call nand_scan_ident ( ) and nand_scan_tail ( ) function .6) nand_scan_ident ( ) calls the same file under the nand_set_defaults ( ) and nand_get_flash_type ( ) ,nand_set_defaults ( ) function to the struct structure of the nand_chip function pointer for assignment .
In this function that maps cmdfunc to nand_command ,nand_get_flash_type ( ) reads the manufacturers and equipment ID ,and the struct structure of the nand_chip variables and mtd_info initialization operation .
7) ( nand_scan_tail ) were ECC settings and the rest of the MTD driver of the initialization function .8) the nand_select_device ( ) function is used to open or close the NAND chip ,1 open ,0 closed .
Chip-> ;cmd_ctrl map to hwcontrol ( in drivers / MTD / NAND / S3c2410_nand.c board_nand_init ( ) function) .9) return ( nand_init ) ,which NAND initialization is complete .Transplantation of Nandflash drive, is largely modified S3c2410_nand.
c .A Read example: common / env_nand.c read the Nandflash environment variable as an example ,env_nand.c called nand_read ( & ;nand_info ,offset ,& ;len ,char_ptr ) ;nand_read in include / nand.
h defined .Static inline int nand_read ( nand_info_t * info ,loff_t ofs ,size_t * len ,u_char * buf ) {& # 160 ;& # 160 ;& # 160 ;return info-> ;read ( info ,ofs ,len ,len ,buf ( size_t * ) ) ;} nand_read info-> read ,mtd_info call ;read ,mtd_info and nand_info_t name .
The mtd_info read function in drivers / NAND / nand_base.c nand_scan_tail function is mapped to the nand_read ( ) ,nand_read ( in ) to call nand_do_read_ops ( ) .This is the last layer ,by calling the nand_chip function complete with ECC read operations .
Now proceed to transplantation: modification of include / configs / TE2440II.h / * * Command line following configuration. * / # include < ;config_cmd_default.h> ;define CONFIG_CMD_CACHE define CONFIG_CMD_DATE # # # define CONFIG_CMD_ELF define CONFIG_CMD_NAND define CONFIG_CMDLINE_EDITING # # # ifdef CONFIG_CMDLINE_EDITING undef CONFIG_AUTO_COMPLETE else define # # # CONFIG_AUTO_COMLETE # ENDIF / * * NAND flash setting * / # if defined define CONFIG_SYS_NAND_BASE 0x4e000000 ( CONFIG_CMD_NAND ) # # define CONFIG_SYS_MAX_NAND_DEVICE 1 define CONFIG_MTD_NAND_VERIFY_WRITE 1 # # define NAND_SAMSUNG_LP_OPTIONS 1 define CONFIG_NAND_S3C2440 1 # # ENDIF environment variables that modify part of define CONFIG_ENV_IS_IN_FLASH& :/ / # # 160 ;& # 160 ;& # 160 ;1 # define CONFIG_ENV_IS_IN_NAND 1& # 160 ;& # 160 ;& # 160 ;& & # # 160 ;160 ;160 & 160 & # ;# # ;& 160 ;/ * environment variable save location * / Drivers / MTD / NAND / M Akefile file add :COBJS-y + = s3c2440_nand.
o COBJS - $ ( CONFIG_NAND_S3C2440 + = s3c2440_nand.o ) is the most important thing for us to modify the s3c2410_nand.c ,copy it and renamed s3c2440_nand.c ,because S3C2410 and S3C2440 in the NAND controller has many different ,so to transplant .
Change s3c2440_nand.c to define& :# # 160 ;& # 160 ;& # 160 ;NF_BASE& & # # 160 ;160 ;160 & 160 & # ;# ;& # 160 ;& # 160 ;& # 160 ;0x4e000000 define& & # # # 160 ;160 ;160 & # ;NFCONF& # & 160 ;# 160 & # ;160 ;160 & 160 & # ;# & # ;160 ;160 & 160 & # ;# ;_ _ REGi ( NF_BASE + 0x0 ) # define& # & # 160 ;160 ;160 & # ;& # 160 ;NFCONT& & # # 160 ;160 ;160 & # ;& & # # 160 ;160 ;160 & 160 & # ;# ;_ _ REGi ( NF_BASE + 0x4 ) # define& # 160 ;& # 160 ;& # 160 ;NFCMD& & # # 160 ;160 ;160 & 160 & # ;# & # ;160 ;160 & 160 & # ;# # 160 ;& ;& # 160 ;& # 160 ;_ _ REGb ( NF_BASE + 0x8 ) # define& # 160 ;& # 160 ;& # 160 ;NFADDR& & # # 160 ;160 ;160 & 160 & # ;# & # ;160 ;160 & 160 & # ;# ;& # 160 ;_ _ REGb ( NF_BASE + 0xc ) # define& # 160 ;& # 160 ;& # 160 ;NFDATA& & # # 160 ;160 ;160 & 160 & # ;# ;& 160 & # # ;160 ;160 & 160 & # ;# ;& # _ _ ( NF_BASE REGb 160 ;+ 0x10 define& 160 ) # # ;& # 160 ;& # 160 ;& # 160 ;NFMECCD0& & # # 160 ;160 ;160 & # ;_ _ REGi ( NF_BASE + 0x14 ) # define& # & # 160 ;160 ;160 & # ;& # 160 ;NFMECCD1& & # # 160 ;160 # ;& 160 ;_ _ REGi ( NF_BASE + 0x18 ) # define& # & # 160 ;160 ;160 & # ;& # 160 ;NFSECCD& & # # 160 ;160 ;160 & 160 & # ;# ;& # 160 ;& # 160 ;_ _ REGi ( NF_BASE + 0x1C ) # define& # 160 ;& # 160 ;& NFSTAT& # # 160 ;160 ;160 & # # ;& 160 & 160 & # ;# ;160 ;160 & 160 & # ;# & # ;160 ;160 & 160 & # ;# ;_ _ REGb ( NF_BASE + 0x20 ) # define& # & # 160 ;160 ;160 & # # ;NFSTAT0& 160 ;# 160 & ;& # 160 & 160 & # ;# ;160 ;160 & 160 & # ;# ;& # 160 ;_ _ REGi ( NF_BASE + 0x24 ) # define& # 160 ;& # 160 ;& # 160 ;NFSTAT1& & # # 160 ;160 ;160 & 160 & # ;# # 160 ;& ;& # 160 ;160 & 160 & # ;# ;_ _ REGi ( NF_BASE + 0x28 ) # define& # 160 ;& # 160 ;& # 160 ;NFMECC0& & # # 160 ;160 ;160 & 160 & # ;# ;& # 160 ;& # 160 ;& # _ _ REGi ( 160 ;NF_BASE + 0x2C define& 160 ) # # ;& # 160 ;& NFMECC1& # # 160 ;160 ;160 & 160 & # ;# & # ;160 ;160 & 160 & # ;# ;& # 160 ;_ _ REGi ( NF_BASE + 0x30 ) # define& # 160 ;# 160 & ;& # 160 ;NFSECC& & # # 160 ;160 ;160 & 160 & # ;# & # ;160 ;160 & 160 & # ;# & # ;160 ;160 & 160 & # ;# ;_ _ REGi ( NF_BASE + 0x34 ) # define& # 160 ;& # & # 160 ;NFSBLK& 160 ;# 160 & 160 & # ;# ;160 ;160 & 160 & # ;# ;& # 160 & 160 & # ;# ;160 ;160 & 160 & # ;# ;_ _ REGi ( NF_BASE + 0x38 ) # define& # & # 160 ;160 ;160 & # # ;NFEBLK& 160 ;& & # # 160 ;160 ;160 & 160 & # ;# ;& # 160 & 160 & # ;# ;160 ;160 & 160 & # ;# ;_ _ REGi ( NF_BASE + 0x3c ) define S3C2440_NFCONT_nCE& # # 160 ;& # 160 ;& # 160 ;( 1< ;< ;1 define S3C2440_ADDR_NALE 0x0c # # ) define S3C2440_ADDR_NCLE 0x08 Ulong IO_ADDR_W = NF_BASE ;static void s3c2440_hwcontrol ( struct mtd_info * MTD ,int CMD ,unsigned int CTRL ) {& # 160 ;& # 160 ;& # 160 ;struct nand_chip * chip = mtd-> ;priv ;# 160 & ;& # 160 ;& # 160 ;DEBUGN ( " ;hwcontrol ( ) :0x%02x 0x%02x / n" ,Vibram Five Fingers,CMD ,Moncler Sale,CTRL ) ;;& # 160 ;& # 160 ;& # 160 ;if ( Ctrl & ;NAND_CTRL_CHANGE ) {& # 160 ;160 & 160 & # ;# & # ;160 ;160 & 160 & # ;# ;& # 160 ;IO_ADDR_W = NF_BASE ;& # 160 & 160 & # ;# ;160 ;160 & 160 & # ;# ;& # 160 ;& # ( 160 ;if !( Ctrl & ;NAND_CLE ) ) / / write is # address & 160 & 160 & # ;# ;160 ;160 & # # 160 ;& ;& # 160 & 160 & # ;# ;160 ;160 & 160 & # ;# ;& # 160 ;{& 160 & # # ;160 ;160 & 160 & # ;# ;& # 160 & 160 & # ;# ;160 ;160 & 160 & # ;# ;& # 160 ;& # 160 ;IO_ADDR_W = S3C2440_ADDR_NALE ;} & 160 & # # ;160 ;160 & 160 & # ;# ;& # 160 ;& # 160 ;& # ( 160 ;if !( Ctrl & ;NAND_ALE ) ) / / write is Command & # 160 ;# 160 & ;& # 160 & 160 & # ;# ;160 ;160 & 160 & # ;# & # ;160 ;160 & 160 & # ;# ;& # 160 ;{& # 160 ;160 & 160 & # ;# & # ;160 ;160 & 160 & # ;# # 160 ;& ;& # 160 ;160 & 160 & # ;# ;& # 160 ;IO_ADDR_W = S3C2440_ADDR_NCLE ;} & 160 & # # ;160 ;160 & 160 & # ;# ;& # 160 ;& # 160 ;& # 160 ;if ( Ctrl & ;NAND_NCE ) & 160 & # # ;160 ;160 & 160 & # ;# & # ;160 ;160 & 160 & # ;# ;& # 160 & 160 & # ;# ;160 ;160 & 160 & # ;# ;& # 160 ;{NFCONT & ;S3C2440_NFCONT_nCE = ~ ;/ / enable NAND Flash & # 160 & 160 & # ;# ;160 ;160 & 160 & # ;# ;& # 160 & 160 & # ;# ;160 ;160 & 160 & # ;# ;& # 160 ;/ / DEBUGN ( " ;NFCONT is 0x%x ," ;NFCONT ) # 160 ;& ;& # 160 & 160 & # ;# ;160 ;160 & 160 & # ;# ;& # 160 & 160 & # ;# ;160 ;160 & 160 & # ;# ;/ / DEBUGN ( " ;NAND Enable " ;& # ) ;160 ;160 & # # ;& 160 & 160 & # ;# ;160 ;160 & 160 & # ;# & # ;160 ;160 & 160 & # ;# ;& # 160 ;} & 160 & # # ;160 ;160 & 160 & # ;# ;& # 160 ;# 160 & ;& # 160 ;else & # 160 & 160 & # ;# ;160 ;160 & 160 & # ;# ;& # 160 & 160 & # ;# ;160 ;160 & 160 & # ;# ;& # 160 ;{NFCONT = S3C2440_NFCONT_nCE ;& # 160 ;/ / NAND Flash & # 160 prohibited # 160 ;& ;& # 160 & 160 & # ;# ;160 ;160 & 160 & # ;# & # ;160 ;160 & 160 & # ;# ;& # 160 ;/ / DEBUGN ( " ;NAND disable " ;& # ) ;160 ;160 & 160 & # ;# # 160 ;& ;& # 160 ;160 & 160 & # ;# & # ;160 ;160 & 160 & # ;# ;& # 160 ;} & 160 & # # ;160 ;160 & # # ;} & 160 & 160 & # ;# ;160 ;if ( CMD = = = = = = !NAND_CMD_NONE # ) & 160 & 160 & # ;# ;160 ;160 & 160 & # ;# ;& # 160 ;& # ( CMD ,160 ;writeb ( void * IO_ADDR_W ) ) ;} static int s3c2440_d Ev_ready ( struct mtd_info MTD ) {& # 160 ;& # 160 ;& # 160 ;DEBUGN ( " ;dev_ready / n" ;) ;160 & 160 & # ;# ;& # 160 ;return ( NFSTAT & ;0x01 ) ;} / * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * / int board_nand_init ( struct nand_chip NAND ) {& # 160 ;160 & 160 & # ;# ;& # 160 ;u_int32_t & CFG ;& # # 160 ;160 ;160 & # ;& # 160 ;u_int8_t tacls ,twrph0 ,twrph1 & # ;160 ;160 & 160 & # ;# ;& # 160 ;S3C24X0_CLOCK_POWER const clk_power = S3C24X0_GetBase_CLOCK_POWER ( ) ;& 160 & # # ;160 ;160 & # ;& # 160 ;DEBUGN ( " board_nand_init ) / n" ( ;;) ;160 & # # 160 ;& ;& # 160 & # ;160 ;clk_power-> ;CLKCON ( < = 1 ;< ;4) ;160 & 160 & # ;# ;& # 160 ;DEBUGN ( " ;CONFIG_S3C2440 / n" ;) ;& 160 & # # ;160 ;160 & 160 & # ;# ;# 160 & ;& # 160 ;& # 160 ;twrph0 = 4 ;twrph1 = 2 ;tacls = 0 ;160 & 160 & # ;# ;& # 160 ;CFG = ( tacls< ;< ;12) ( twrph0< ;< ;8) ( twrph1< ;< ;4) ;160 & 160 & # ;# ;& # 160 ;NFCONF = CFG ;& # 160 ;160 & 160 & # ;# ;/ / DEBUGN ( " ;CFG is %x / n" ,CFG & # ;) ;1 60 & 160 & # ;# ;160 ;/ / DEBUGN ( " ;NFCONF is %lx / n" ,NFCONF & # ;) ;160 ;160 & # ;& # 160 ;CFG = ( 1< ;< ;6) ( 1< ;< ;4) ( 0< ;< ;1< ;( 1 ) < ;0) ;160 & 160 & # ;# ;& # 160 ;NFCONT = CFG ;& # 160 ;160 & 160 & # ;# ;/ / DEBUGN ( " ;CFG is %lx / n" ,CFG & # ;) ;160 ;160 & 160 & # ;# ;/ / DEBUGN ( " ;NFCONT is %x / n" ,NFCONT ;) ;/ * initialize nand_chip data structure * / 160 & 160 & # ;# & # ;160 ;nand-> ;IO_ADDR_R = nand-> ;IO_ADDR_W = ( void * 0x4e000010 ) ;& 160 & # # ;160 ;160 & # ;/ * read_buf and write_buf are default * / 160 & 160 & # ;# # ;& 160 ;/ * read_byte and write_byte are default * / 160 & 160 & # ;# # ;& 160 ;/ * hwcontrol always must be implemented * / 160 & 160 & # ;# & # ;160 ;nand-> ;cmd_ctrl = s3c2440_hwcontrol ;160 & 160 & # ;# & # ;160 ;nand-> ;dev_ready = s3c2440_dev_ready ;& # 160 ;& # 160 ;& # 160 ;return 0 ;} s3c2440_hwcontrol function control is a write command or a write address .
The problem I encountered ,because board_nand_init ( ) function I did not add return 0 ,leading to the back of the judge out the results read out of the NAND ,0MiB ,so transplantation must carefully read the source code ,there is a problem of uboot print information appears in NAND_ECC_NONE selected by board driver .
This is not recommended !!,this is the root of ECC check mode ,someone says it is said that vivi or uboot via software algorithm to generate ECC code in the S3C2410 NAND Flash controller generates the ECC checksum is consistent ,so I didn change anything, I set the printing information and comments off .
Related articles：
没有评论:
发表评论